For designing Critical Conduction Mode Boost Converter Calculations using L6562 here consider an example of 50W PFC circuit which we have to design. 1) First detail input specifications have to be defined. · Mains voltage range (Vac rms): VACmin = 85Vac and VACmax = 265Vac · Minimum mains frequency: fl = 47Hz · Rated output power (W): Pout = 50W · Regulated DC output voltage (Vdc): Vout = 400 V Here the output has been set at 400 Vdc as the typical value because we know that in boost topology based PFC the regulated output voltage depends strongly on the maximum AC input voltage and for correct operation of boost the output voltage must always be higher than the input i.e. VACmax ⋅ √2= 374 Vpk (Consider output voltage must be 6 to 7% higher than the maximum input voltage peak). · Expected efficiency (%): η = Pout / Pin = 93% We had selected the efficiency and PF at minimum input voltage and maximum load. · Expected power factor: PF = 0.99 · Maximum output overvoltage (Vdc): ΔOVP = 55V Excessive output voltage at startup or in case of load transients is generated because of the narrow loop voltage bandwidth. This overvoltage at PFC output can overstress the output components and the load. The L6562 integrates an overvoltage protection (OVP) to solve this problem. OVP sets the extra voltage over imposed at Vout. · Maximum output low-frequency ripple: ΔVout = 20 V We know that the ripple amplitude determines the current flowing into the output capacitor and the ESR. The mains frequency generates a 2fL voltage ripple on the output voltage at full load. · Minimum output voltage after line drop (Vdc): Vout min = 300 V · Holdup capability (ms): tHold = 10 ms It is a holdup capability in case of mains dips. · Minimum switching frequency (kHz): fsw min = 35 kHz This will decide our boost inductor. Here we consider the switching frequency at low mains on the top of the sinusoid and at full load conditions. For wide range operation the minimum frequency range should be in between 20 to 50 kHz. Be aware frequency should not be very high otherwise high losses will occur at high input voltage. · Maximum ambient temperature (°C): Tambx = 50 °C It is the local temperature at which the PFC components are working. 2) Operating Condition of the PFC circuit. · Rated DC output current: Iout = (Pout/Vout) = 50W / 400V = 0.125A · Maximum input power: Pin = (Pout/η) = (50W/93) x 100 = 53.76W · RMS input current: Iin = (Pin/VACmin · PF) = 54W / (85Vac · 0.99) = 0.641A We considered; Pin = 54W · Peak inductor current: ILpk = 2 · √2 · Iin = 2 · √2 · 0.641 = 1.812A We know that the inductor current is a triangle shape at switching frequency, and the peak of triangle is twice its average value (please refer Figure 1). The average value of the inductor current is exactly the peak of the input sine wave current, and therefore RMS inductor current can be calculated by using RMS input current. Critical Conduction Mode PFC operation · RMS inductor current: ILrms = (2/√3) · Iin = (2 / √3) · 0.641 = 0.740A · AC inductor current: ILac = √(ILrms² - Iin²) = √[(0.740)²-(0.641)²] = 0.369A In Inductor during the on time, the current increases from zero up to the peak value and circulate into the switch, while during the off time the current decreases from peak down to zero and circulate into the diode. So, a triangular wave current, having peak value equal to the inductor current flows through switch and diode. Now we can calculate the RMS current flowing in to both of these components in order to calculate the losses of these two components. · RMS switch current: ISWrms = ILpk · √[(1/6) – (4√2/9π) · (VACmin/Vout)] = 1.812 · √[(1/6) – (4√2/9π) · (85Vac/400V)]= 0.638A · RMS diode current: IDrms = ILpk · √[(4√2/9π) · (VACmin/Vout)] = 1.812 · √[(4√2/9π) · (85Vac/400)] = 0.373A 3) Power section design of the PFC circuit. · Bridge Rectifier Following points has to be considered while selecting it; o Normally a 600V device is selected in order to have good margin against mains surges. o Use a NTC as a current limiter to avoid overstress to the Rectifier Bridge and fuse. o To calculate rectifier bridge power dissipation; Iinrms = √2 · Iin/2 = √2 · 0.641A/2 = 0.453A Iin_avg = √2 · Iin/π = √2 · 0.641A/3.141 = 0.288A Pbridge = 4 · Rdiode · Iinrms + 4 · Vth · in_avg = 4 · 0.07Ω · (0.453A)² + 4 · (1V) · 0.288A = 1.209W From the bridge rectifier datasheet we had selected; Threshold Voltage = Vth = 1V Dynamic resistance = Rdiode = 0.07Ω · Input Capacitor The need of input high-frequency filter capacitor (Cin) is to attenuate the switching noise which arises because of high-frequency inductor current ripple. Cin = Iin/(2π · fswmin · r · VACmin) = 0.641A/(2π · 35kHz · 0.2 · 85Vac) = 0.171µF = 0.15µF (nearby value selected) Where; r = 0.2 This value is selected because the maximum high-frequency voltage ripple across Cin is generally arises between 5% and 20% of the minimum rated input voltage. Use DC film capacitor for this application. · Output Capacitor The output bulk capacitor (Co) selection depends on; o Regulated DC output voltage o Rated Output Power o Maximum output overvoltage Therefore, Co ≥ Pout/(2π · fi · Vout · ΔVout) Co ≥ 50/(2π · 47Hz· 400V · 20V) = 21.1µF The total RMS capacitor ripple current, including mains frequency and switching frequency components; ICrms = √(IDrms² - Iout²) = √(0.373² - 0.125²) = 0.351 If Holdup time of capacitor is needed for the PFC stage then the capacitance value changes to; CO = (2 · Pout · tHold)/[(Vout - ΔVout)² - (Vout min)²] = (2 · 50 · 10ms)/[(400V - 20V)² - (300V)²] = 18.3µF Holdup time means, CO has to deliver the output power for a certain time (tHold) with a specified minimum output voltage (Vout min). It’s good to add 20% tolerance to the electrolytic capacitors for the right dimensioning. So by adding 20% to 18.3uF we will get 21uF. So, by considering greater nearby value a capacitor value of 22uF/450V has been selected. i.e. Co = 22µF/450V By this new capacitor value the calculated Holdup capability is; tHold = {CO[(Vout – ΔVout)² - Vout min²]}/2 · Pout = {22µ[(400 – 20)² - 300²]}/2 · 50 = 12ms By this new capacitor value the calculated output voltage ripple variation is; ΔVout = Iout/(2π · fi · CO) = 0.125A/(2π · 47Hz · 22µ) = 19.24V · Boost Inductor Working frequency of converter is determined by boost inductor. To ensure a correct Transition Mode operation keep minimum switching frequency greater than the maximum frequency of the L6562A internal starter (which is 190µs). ON time and the OFF time of the power MOSFET is given by; ton (VAC, θ) = L · ILpk · sin(θ)/[√2 · VAC · sin(θ)] = L · ILpk/√2 · VAC toff (VAC, θ) = L · ILpk · sin(θ)/[Vout - √2 · VAC · sin(θ)] Where, ILpk is the maximum peak inductor current in a line cycle. θ is the instantaneous line phase in the interval [0,π] Also, ON time is constant over a line cycle. We know that, Peak inductor current: ILpk = 2 · √2 · Iin = 2 · √2 · 0.641 = 1.812A Therefore; ton (VAC, θ) = L · 2 · √2 · Iin /√2 · VAC toff (VAC, θ) = L · 2 · √2 · Iin · sin(θ)/[Vout - √2 · VAC · sin(θ)] We can find the instantaneous switching frequency along a line cycle by; fSW (VAC, θ) = 1 / (Ton + Toff) = VAC² · [Vout - √2 · VAC · sin(θ)] / 2 · L · Pin · Vout We know that the switching frequency is the minimum at the top of the sinusoid (θ = π/2 rad => sin θ =1), maximum at the zero-crossings of the line voltage (θ = 0 rad or π rad=> sin θ =0), where Toff =0μs. The minimum frequency fswmin can occur at either the maximum mains VACmax or the minimum mains voltage VACmin, thus the inductor value can be given by; L(VAC) = [VAC² · (Vout - √2 · VAC)] / [2 · fswmin· Pin · Vout] Now we can calculate the inductor values for; L(VACmin) = [(85Vac)² · (400V - √2 · 85Vac)] / [2 · 35kHz · 50W · 400V] = 1.44mH L(VACmax) = [(265Vac)² · (400V - √2 · 265Vac)] / [2 · 35kHz · 50W · 400V] = 1.26mH For this application a 1.26mH boost inductance has been selected. The minimum value has to be taken into account. Now we can re-calculate the minimum switching frequency by; fswmin (VACmin) = [(VACmin)² · (Vout - √2 · VAC)] / [2 · L · Pin · Vout] By putting the value of L = 1.26mH fswmin (VACmin) = [85AC² · (400V- √2 · 85AC)] / [2 · (1.26m)· 50W · 400] = 40kHz fswmin (VACmax) = [(VACmax)² · (Vout - √2 · VAC)] / [2 · L · Pin · Vout] By putting the value of L = 1.26mH fswmin (VACmax) = [265AC² · (400V- √2 · 265AC)] / [2 · (1.26m)· 50W · 400] = 35kHz So, after re-calculating the minimum switching frequency we got 35 kHz as expected. · Power MOSFET selection RDS(ON) is the major criteria to select MOSFET. It depends on the output power (In our case it is 50W), Output voltage (In our case it is 400V), maximum output overvoltage (In our case it is 55V) and a tolerance of 20%. So, 1.2 · Vout = MOSFET voltage rating 1.2 · 400 = 480V MOSFET voltage rating = 500V (Considering nearby value). Already we had calculated the RMS Switch Current; RMS switch current = 0.638A So, 3X 0.638A = 1.914A = 2A (by rounding up) This is the maximum current rating of the MOSFET. For our 50W PFC application we had selected IRF840MOSFET. Let proceed further with the calculation of MOSFET’s power dissipation which depends on conduction, switching and capacitive losses. Conduction Loss: The conduction losses at maximum load and minimum input voltage are calculated by: Pcond(VACmin) = RDSon · [ISWrms(VACmin)]² = 2 · [0.638 (85V)]² = 5881.7 Pcond(VACmax) = RDSon · [ISWrms(VACmax)]² = 2 · [0.638 (265V)]² = 57169.3 We had selected RDSon = 2 because in datasheet normally it is given in reference to ambient temperature 25◦C. To calculate correctly the conduction losses at 100 °C (typical MOSFET junction operating temperature) a factor of 2 should be taken into account. Switching Loss: The switching losses in the MOSFET occur only at turnoff because of Transition Mode operation and can be basically expressed by; Pswitch(VACmin) = VMOS · IMOS· tfall · fsw (VACmin) = 550 · 8 · 6n sec · 35 KHz (85) = 78.54 Pswitch(VACmax) = VMOS · IMOS· tfall · fsw (VACmax) = 550 · 8 · 6n sec · 35 KHz (265) = 244.86 Above equations represents the crossing between the MOSFET current that decreases linearly during the fall time and the voltage on the MOSFET drain that increases. Switching losses also depends on the total drain capacitance as during the fall time the current of the boost inductor flows into the parasitic capacitance of the MOSFET charging it. As switching frequency depends on the input line voltage and the phase angle on the sinusoidal waveform; by considering the above equation the switching losses per 1µs of current fall time and 1nF of total drain capacitance can be written as: At turn-on the losses are due to the discharge of the total drain capacitance inside the MOSFET itself. Capacitive Loss: The capacitive losses are given by: Pcap(VAC) = 0.5 · Cd · V²MOS · fsw(VAC) Where; Cd = the total drain capacitance including the MOSFET and the other parasitic capacitances such as the inductor at the drain node. V²MOS = the drain voltage at MOSFET turn ON. Taking into account the frequency variation with the input line voltage and the phase angle, a detailed description of the capacitive losses per 1nF of total drain capacitance can be calculated as: ϑ1 and ϑ2 depend on input voltage and they are defined as follows: ϑ1 = arcsin (Vout / 2√2VAC) ϑ2 = π – ϑ1 The total loss function of the input mains voltage is the sum of Conduction, Switching and Capacitive losses; Ploss(VAC) = RDSon · P’cond (VAC) + (t²fall/Cd) · P’sw(VAC) + Cd · P’cap (VAC) From the maximum ambient temperature (Tambx = 50 °C), the total maximum thermal resistance required to keep the junction temperature below 125 °C is: Rth = [(125 °C – Tambx) / Ploss (VAC)] = _____ If the result of above equation is lower than the junction-ambient thermal resistance given in the MOSFET datasheet for the selected device package, a heat sink must be used. Important observations; ü The MOSFET turn-on occurs just on the valley because the inductor has depleted its energy and therefore it can resonate with the drain capacitance. ü It is clear that for an input voltage theoretically lower than half of the output voltage the resonance ideally should reach zero achieving zero-voltage operation, therefore there are no losses relevant to this edge. ü For input voltage corresponding to a positive value of the valley, capacitive losses are not generated. ü However, the MOSFET turn-on always occurs at the minimum voltage of the resonance and therefore the losses are minimized. ü Capacitive losses are dominant at high mains voltage and the major contribution came from the conduction losses at low and medium mains voltage. · Boost Diode selection For selecting output rectifier; Select a minimum breakdown voltage of = 1.2 · (Vout + ΔVovp) = 1.2 · (400V + 55V) = 546V Where, Maximum output overvoltage (Vdc): ΔOVP = 55V Select a current rating higher then = 3 · Iout = 3 · (0.125A) = 0.375A Further calculation related to thermal will give right selection. If the diode junction temperature operates within 125 °C the device has been selected correctly, otherwise a bigger device must be selected. In this 50 W application an STTH1L06 (600 V, 1 A) has been selected. For this diode; Rectifier threshold voltage = Vth = 0.89V Dynamic resistance = Rd = 0.165Ω Also, already we had calculated; AVG = Rated DC output current = Iout = 0.125A RMS = RMS diode current = IDrms = 0.373A Pdiode = Vth · Iout + Rd · ID²rms = 0.89 · 0.125 + 0.165 · (0.373)² = 0.11125 + 0.02295 = 0.1342W Maximum ambient temperature = Tambx = 50°C Rth = (125°C – Tambx) / Pdiode = (125°C- 50°C) / 0.1342W = 558.86 There’s no need of any heat sink for the rectifier as; the calculated Rth is higher than the STTH1L06 thermal resistance junction to ambient .i.e. Rth(j-a) = 70 for DO-41 package with lead length 10mm. Now, to evaluate the conduction losses use the following equation: P = [0.89 · IF(AV) ]+ [0.165 · IF²(RMS)] = [0.89 ·1] + [0.165 · 10²] = 17.39 Where; IF(AV)= Average forward current (δ = 0.5) = 1A for DO-41 package. IF(RMS)= Forward RMS voltage = 10A for DO-41 package. Reference : Referred STMicroelectronics "Solution for designing a transition mode PFC preregulator with the L6562A". Link is at below; https://www.st.com/content/ccc/resource/technical/document/application_note/72/e5/be/2c/74/20/45/bb/CD00195944.pdf/files/CD00195944.pdf/jcr:content/translations/en.CD00195944.pdf